1. Field of the Invention
The present invention relates to a direct frequency modulation apparatus which modulates frequency by applying a data-dependent voltage to the control terminal of a voltage-controlled oscillator without the mediacy of a phased-locked loop (PLL), and a communication system having the direct frequency modulation apparatus.
2. Description of the Related Art
One method of communication is the frequency modulation method. According to the frequency modulation method, data are exchanged by, for example, making two different frequencies correspond to data of “1” and “0”. FIG. 1 is a block diagram for explaining the schematic arrangement of a conventional direct frequency modulation apparatus. FIG. 1 shows extracted part of a communication system 1 which modulates the frequency by changing a voltage applied to the control terminal of a voltage-controlled oscillator in accordance with data of “1” or “0”. Communication systems of this type have been reported in, e.g., A. Ajjikuttira et. al., “A Fully-Integrated CMOS RFIC for Bluetooth Applications”, 2001 IEEE International Solid-State Circuits Conference DIGEST OF TECHNICAL PAPERS, February 2001, pp. 198–199, and M. Kokubo et. al., “A 2.4 GHz RF Transceiver with Digital Channel-Selection Filter for Bluetooth”, 2002 IEEE International Solid-State Circuits Conference, February 2002, pp. 94–95.
The communication system 1 comprises a baseband LSI (BaseBand LSI) 2, low-pass filter (LPF) 3, voltage-controlled oscillator (VCO) 4, power amplifier (PA) 5, and phase-locked loop (PLL) 6.
The baseband LSI 2 controls each circuit in the system. Transmission data DATA output from the baseband LSI 2 is supplied to the low-pass filter 3, and a signal ChannelCont for designating a frequency channel is supplied to the phase-locked loop 6. A signal LPFen is supplied to the low-pass filter 3 and phase-locked loop 6 to control their activation/inactivation.
A reference clock RefClk and an oscillation signal VCOout1 output from the voltage-controlled oscillator 4 are input to the phase-locked loop 6. The reference clock RefClk is frequency-divided by a frequency channel designated by the signal ChannelCont supplied from the baseband LSI 2. A control voltage (voltage for setting a channel frequency) Vch is so regulated as to lock the phases of the frequency-divided clock and oscillation signal VCOout1, and is applied to one input terminal V1 of the voltage-controlled oscillator 4. During this regulation period, a voltage (Vmod) which hardly depends on the temperature or power supply voltage is applied from the low-pass filter 3 to the other input terminal V2 of the voltage-controlled oscillator 4. Activation/inactivation of the voltage-controlled oscillator 4 is controlled by a signal VCOen, and the voltage-controlled oscillator 4 operates as a frequency modulation circuit together with the low-pass filter 3.
Oscillation signals VCOout1 and VCOout2 output from output terminals out1 and out2 of the voltage-controlled oscillator 4 are supplied to the power amplifier 5 where they are amplified to output a transmission signal RFout. A signal PAen is supplied to the power amplifier 5 to control its activation/inactivation.
FIG. 2 is a timing chart showing the waveform of each signal in the communication system 1 shown in FIG. 1. At time t1, the signal ChannelCont changes, the frequency channel changes from ch21 to ch9, and the signal VCOen changes to the “H” level to activate the voltage-controlled oscillator 4. The voltage-controlled oscillator 4 then outputs an oscillation signal VCOout1 having a frequency finit corresponding to the voltages Vch and Vmod applied to the input terminals V1 and V2. At this time, the low-pass filter 3 is inactive (output of a voltage corresponding to data stops, and the reference voltage Vref is output), and the phase-locked loop 6 is active because of an “L”-level signal LPFen. The phase-locked loop 6 frequency-divides the reference clock RefClk so as to correspond to the frequency channel ch9 designated by the signal ChannelCont. The phase-locked loop 6 sets the control voltage Vch so as to lock the phases of the frequency-divided clock and oscillation signal VCOout1 (time t2).
When the signal PAen changes to the “H” level, the power amplifier 5 is activated to amplify the oscillation signals VCOout1 and VCOout2 and output the transmission signal RFout having the frequency finit (time t3).
When the operation of the voltage-controlled oscillator 4 is stabilized, the activation signal LPFen of the low-pass filter 3 changes to the “H” level (time t4) to activate the low-pass filter 3 (a voltage corresponding to data can be output). The data DATA from the baseband LSI 2 is transferred to the low-pass filter 3. At the same time, the feedback loop of the phase-locked loop 6 is broken to hold the level of the control voltage Vch. In this state, the voltage Vmod applied from the low-pass filter 3 to the input terminal V2 of the voltage-controlled oscillator 4 is changed (increased or decreased) in accordance with “1” or “0” data DATA, thus modulating the oscillation frequency finit.
If, for example, the data DATA is “1”, the voltage Vmod rises from the level of the reference voltage Vref to a level corresponding to “1”, and the frequencies of the oscillation signals VCOout1 and VCOout2 output from the voltage-controlled oscillator 4 change (rise) to f1. The power amplifier 5 amplifies outputs from the voltage-controlled oscillator 4 to output a transmission signal RFout having the frequency f1.
If the data DATA is inverted to “0” (time t5), the voltage Vmod drops from the level corresponding to “1” to a level corresponding to “0”, and the frequency of the oscillation signal VCOout1 output from the voltage-controlled oscillator 4 changes (drops) to f0. As a result, the power amplifier 5 outputs a transmission signal RFout having the frequency f0.
After time t6, the above-described operation is repeated in accordance with “1” or “0” data DATA.
When the signal LPFen is inverted to the “L” level at time t7, reception of the data DATA from the baseband LSI 2 stops, the feedback loop of the phase-locked loop 6 operates, and the level of the control voltage Vch returns to the initial state. The voltage Vmod returns to the reference voltage Vref, the signal VCOen changes to the “L” level, and the frequencies of the oscillation signals VCOout1 and VCOout2 return to the initial value finit. The signal PAen changes to the “L” level, and the transmission signal RFout output from the power amplifier 5 stops (time t8).
At time t9, the frequency channel changes from ch9 to ch55 by the signal ChannelCont, and the operation at t1 to t8 is repeated.
FIG. 3 shows a circuit arrangement example of the voltage-controlled oscillator 4 in the communication system 1 shown in FIG. 1. The voltage-controlled oscillator 4 comprises channel selection voltage-variable capacitive elements (frequency channel varactor diodes or varicap diodes) Cch1 and Cch2, frequency modulation voltage-variable capacitive elements (frequency channel varactor diodes or varicap diodes) Cmod1 and Cmod2, an inductance element L1, and inverters 11 and 12. One terminal (cathode) of each of the voltage-variable capacitive elements Cch1 and Cch2 is commonly connected to the input terminal V1, and receives the control voltage Vch (voltage corresponding to the channel frequency: e.g., 1.5 V) output from the phase-locked loop 6. The control voltage Vch is regulated to a value at which the frequency falls within a desired range even if a power supply VDD or temperature Temp varies.
One terminal (cathode) of each of the voltage-variable capacitive elements Cmod1 and Cmod2 is commonly connected to the input terminal V2, and receives the voltage Vmod output from the low-pass filter 3. The voltage Vmod finely adjusts the oscillation frequency, and is, e.g., 1.25 V. The other terminal (anode) of the voltage-variable capacitive element Cch1 and the other terminal (anode) of the voltage-variable capacitive element Cmod1 are connected to the output terminal out1 which outputs the oscillation signal VCOout1. The other terminal (anode) of the voltage-variable capacitive element Cch2 and the other terminal (anode) of the voltage-variable capacitive element Cmod2 are connected to the output terminal out2 which outputs the oscillation signal VCOout2.
The inductance element L1 is connected between the output terminals out1 and out2. The input terminal of the inverter 11 is connected to the output terminal out1, and the output terminal is connected to the output terminal out2. The input terminal of the inverter 12 is connected to the output terminal out2, and the output terminal is connected to the output terminal out1. The oscillation signals VCOout1 and VCOout2 output from the output terminals out1 and out2 oscillate within a range of 0.4 to 1.2 V centered on a voltage Vcm.
FIG. 4A shows the operating points of the channel selection voltage-variable capacitive elements Cch1 and Cch2 during locking to the channel frequency by the phase-locked loop 6. FIG. 4B shows the operating points of the frequency modulation voltage-variable capacitive elements Cmod1 and Cmod2 during locking to the channel frequency by the phase-locked loop 6. As shown in FIG. 4A, the voltage Vch (V(variCap)) applied to the voltage-variable capacitive elements Cch1 and Cch2 changes within a range of 0.3 to 1.1 V. At this time, a capacitance Cch (C(variCap)) decreases along with an increase in voltage Vch. As shown in FIG. 4B, the voltage Vmod (V(variCap)) applied to the variable capacitive elements Cmod1 and Cmod2 changes within a range of 0.05 to 0.85 V. At this time, a capacitance Cmod (C(variCap)) also decreases along with an increase in voltage Vmod.
FIG. 5 shows the operating points of the channel selection voltage-variable capacitive elements Cch1 and Cch2 in frequency modulation. In FIG. 5, the voltage Vmod is shifted by ±25 mV from the value (1.25 V) in locking, and desired frequency modulation is performed. As shown in FIG. 5, the operating point of the channel selection voltage-variable capacitive element Cch is almost the same as that in FIG. 4A because the voltage Vch remains unchanged and a change in voltage Vmod is small.
FIGS. 6A and 6B respectively show the operating point of the frequency modulation voltage-variable capacitive element Cmod (Cmod1 and Cmod2) for data of “1” and “0”. As shown in FIG. 6A, for “1” data, the voltage Vmod rises by 25 mV from the reference voltage, and changes within a range of 0.075 to 0.875 V. As a result, the average capacitance of the capacitance Cmod decreases, and the oscillation frequency f1 rises by df from finit obtained at the reference voltage Vref (f1=finit+df).
As shown in FIG. 6B, for “0” data, the voltage Vmod drops by 25 mV from the reference voltage, and changes within a range of 0.025 to 0.825 V. The average capacitance of the capacitance Cmod increases, and the oscillation frequency f0 drops by df from finit obtained at the reference voltage Vref (f0=finit−df).
That is, capacitance differences of 25 mV on the two sides of the voltage amplitude before and after modulation correspond to modulation frequencies. These capacitance change differences are shown in FIG. 6C. The capacitance change difference corresponds to 0.67 fF, and the temperature characteristic is generated from the difference between a capacitance C (0.05 V) increased after modulation and a capacitance C (0.85 V) decreased after modulation. Especially for “0” data, as shown in FIG. 6C, the capacitance increases by C (0.05V)−C (0.85V), and the oscillation frequency of the voltage-controlled oscillator 4 is decreased by this difference.
FIGS. 7A and 7B are a circuit diagram and sectional view, respectively, showing the voltage-variable capacitive elements Cmod1 and Cmod2. An N-type well region (Nwell) 12 is formed in a P-type semiconductor substrate (Psub) 11. P+-type impurity diffusion regions 13-1 to 13-n which operate as the anode of the voltage-variable capacitive element Cmod1, and a P+-type impurity diffusion region 15 which operates as the anode of the voltage-variable capacitive element Cmod2 are formed in the well region 12. The voltage-variable capacitive element Cmod1 is constituted by parallel-connecting n P-N junction diodes, and is n times in size than the voltage-variable capacitive element Cmod2. N+-type impurity diffusion regions 14-1 and 14-2 are also formed in the well region 12 to receive the voltage Vmod. The well region 12 operates as the cathodes of the voltage-variable capacitive elements Cmod1 and Cmod2.
FIG. 8 shows the C-V characteristic of the voltage-variable capacitive elements Cmod1 and Cmod2. As shown in FIG. 7B, the P-N junctions of the P-N junction diodes are used as the voltage-dependent voltage-variable capacitive elements Cmod1 and Cmod2. Thus, the temperature dependency of the C-V characteristic appears through the temperature dependency of the built-in potential, as shown in FIG. 8. In FIG. 8, a solid line C(LT) represents changes in capacitance at low temperatures, and a broken line C(HT) represents changes in capacitance at high temperatures. −Vbi(LT) represents built-in potentials at low temperatures, and −Vbi(HT) represents built-in potentials at high temperatures. Letting Vf be the forward voltage of the P-N junction diode, and Vbi be the built-in potential, a capacitance C(t) is given byC(t)=K/(Vf+Vbi)awhere a is the slope, and K is the constant.
FIG. 9 shows a circuit arrangement example of the low-pass filter 3 in the communication system 1 shown in FIG. 1. The low-pass filter 3 comprises a band gap reference 7, digital-to-analog converter 8, and filter 9. The band gap reference 7 generates the reference voltage Vref which hardly depends on the temperature. The digital-to-analog converter 8 receives the reference voltage Vref generated by the band gap reference 7, sets an analog voltage in accordance with “1” or “0” data DATA and the level of the signal LPFen, and outputs the analog voltage. The output voltage from the digital-to-analog converter 8 is applied to the filter 9, and the voltage Vmod output from the filter 9 is applied to the input terminal V2 of the voltage-controlled oscillator 4.
FIG. 10 shows a comparison between the C-V characteristic of the low-pass filter 3 shown in FIG. 9 and the temperature dependency of a voltage Veff. The voltage Veff is a potential difference between the two terminals of the varactor diode, and is given by “Veff=Vcm−Vmod”. As shown in FIG. 10, the modulation frequency greatly shifts together with temperature variations because the temperature dependencies of the control voltage (1.25 V) and modulation voltage (25 mV) are much lower than that of the C-V characteristic in a conventional direct frequency modulation method. If the modulation frequency greatly shifts from the setting value, it becomes a noise source to an adjacent channel. To prevent this, the temperature dependency of the modulation frequency is desirably set low.
The temperature dependency of a capacitance which modulates the frequency is quantitatively given by equation (1).                                           dC            ⁡                          (              RT              )                                =                    ⁢                                                    ∫                                  0.05                  ⁢                  V                                                  0.85                  ⁢                  V                                            ⁢                                                                    [                                                                  C                        ⁡                                                  (                          V                          )                                                                    ⁢                                                                                          ⁢                                              ⅆ                        V                                                              ]                                    /                  0.8                                ⁢                                                                  ⁢                V                                      -                                          ∫                                  0.075                  ⁢                  V                                                  0.875                  ⁢                  V                                            ⁢                                                                    [                                                                  C                        ⁡                                                  (                          V                          )                                                                    ⁢                                                                                          ⁢                                              ⅆ                        V                                                              ]                                    /                  0.8                                ⁢                                                                  ⁢                V                                                                                  =                    ⁢                                    [                                                C                  ⁡                                      (                                                                  0.05                        ⁢                                                                                                  ⁢                        V                                            ,                      RT                                        )                                                  -                                  C                  ⁡                                      (                                                                  0.85                        ⁢                                                                                                  ⁢                        V                                            ,                      RT                                        )                                                              ]                        ×                          0.025              /              0.8                                                                                                                                    dC                  ⁢                                      (                    HT                    )                                                  -                                  dC                  ⁡                                      (                    RT                    )                                                              ]                        /                          dC              ⁡                              (                RT                )                                              =                    ⁢                      [                                          {                                                      C                    ⁡                                          (                                                                        0.05                          ⁢                                                                                                          ⁢                          V                                                ,                        HT                                            )                                                        -                                      C                    ⁡                                          (                                                                        0.85                          ⁢                                                                                                          ⁢                          V                                                ,                        HT                                            )                                                                      }                            -                                                                                            ⁢                          {                                                C                  ⁡                                      (                                                                  0.05                        ⁢                                                                                                  ⁢                        V                                            ,                      RT                                        )                                                  -                                  C                  ⁡                                      (                                                                  0.85                        ⁢                                                                                                  ⁢                        V                                            ,                      RT                                        )                                                              }                        ]                    /                                                        ⁢                      {                                          C                ⁡                                  (                                                            0.05                      ⁢                                                                                          ⁢                      V                                        ,                    RT                                    )                                            -                              C                ⁡                                  (                                                            0.85                      ⁢                                                                                          ⁢                      V                                        ,                    RT                                    )                                                      }                                                        =                    ⁢                      [                                                            C                  ⁡                                      (                                                                  0.05                        ⁢                                                                                                  ⁢                        V                                            ,                      RT                                        )                                                  ×                                  a                  ⁡                                      (                                          0.05                      ⁢                                                                                          ⁢                      V                                        )                                                              -                                                                                            ⁢                                          C                ⁡                                  (                                                            0.85                      ⁢                                                                                          ⁢                      V                                        ,                    RT                                    )                                            ×                              a                ⁡                                  (                                      0.85                    ⁢                                                                                  ⁢                    V                                    )                                                      ]                    /                                                        ⁢                      {                                          C                ⁡                                  (                                                            0.05                      ⁢                                                                                          ⁢                      V                                        ,                    RT                                    )                                            -                              C                ⁡                                  (                                                            0.85                      ⁢                                                                                          ⁢                      V                                        ,                    RT                                    )                                                      }                                                        =                    ⁢                                    a              ⁡                              (                                  0.85                  ⁢                                                                          ⁢                  V                                )                                      +                                          {                                                      a                    ⁡                                          (                                              0.05                        ⁢                                                                                                  ⁢                        V                                            )                                                        -                                      a                    ⁡                                          (                                              0.85                        ⁢                                                                                                  ⁢                        V                                            )                                                                      }                            ×                                                                              ⁢                                    C              ⁡                              (                                                      0.05                    ⁢                                                                                  ⁢                    V                                    ,                  RT                                )                                      /                          {                                                C                  ⁡                                      (                                                                  0.05                        ⁢                                                                                                  ⁢                        V                                            ,                      RT                                        )                                                  -                                                                                                          ⁢                          C              ⁡                              (                                                      0.85                    ⁢                                                                                  ⁢                    V                                    ,                  RT                                )                                      }                    ⪢                      a            ⁡                          (                              0.85                ⁢                                                                  ⁢                V                            )                                          
In equation (1), “a(0.05 V)−a(0.85 V)” representing the temperature coefficient difference is physically inevitable. “C(0.05 V, RT)−C(0.85 V, RT)” amplifies the temperature coefficient difference (current amplification factor is about 5).
As is apparent from equation (1), the temperature dependency of the capacitance value at the maximum value of the operating voltage of the voltage-variable capacitive element is smaller than that of the capacitance value at the minimum value. The temperature dependency, therefore, remains in the difference between the two capacitance values. The temperature coefficient of the difference capacitance dC is multiplied by the amplification term given by the second term to be several times larger than the temperature coefficient of the capacitance C.
As described above, a conventional direct frequency modulation apparatus undesirably functions as a noise source to an adjacent communication channel upon temperature variations in modulation frequency.
The same problem also occurs in a communication system having the direct frequency modulation apparatus.